high performance computing on graphics processing units: hgpu.org

This paper describes my work with the Operating Systems and Middleware group for the HPI Research School on "Service-Oriented Systems Engineering". Computer architecture is shifting. The upper levels of the software stack are thus to be adapted in order to benefit from the current and future hardware capabilities. In this paper, we present the Hybrid.Parallel library. It is our approach to bridge the gap between state-of-the-art computer architecture and application developers (in contrast to performance engineers, tuning experts, …) In order to exploit the full computing power of a system, all execution devices have to be identified and used. Tasks and data have to be distributed according to the specific features of the devices and the overall system. We present our analysis of tasks and data in the shared memory parallel domain and propose mappings onto execution units and memory types. Furthermore we discuss language constructs that allow developers to adjust these mappings to their needs. These findings provide the basis for the implementation of the scheduler for our Hybrid.Parallel library and may also be applied to the Single-Chip-Cloud-Computer.