The Stencil Processing Unit: GPGPU Done Right

Sanjay Rajopadhye, Guillaume Iooss, Tomofumi Yuki, Dan Connors
Colorado State University
Colorado State University Technical Report CS-13-103, 2013


   title={The Stencil Processing Unit: GPGPU Done Right},

   author={Rajopadhye, Sanjay and Iooss, Guillaume and Yuki, Tomofumi and Connors, Dan},



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As computing moves to exascale, it will be dominated by energy-efficiency. We propose a new GPU-like accelerator called the Stencil Processing Unit (SPU), for implementing dense stencil computations in an energy-efficient manner. We address all the levels of the programming stack, from architecture, programming API, runtime system and compilation. First, a simple architectural innovation to current GPU architectures enables SPUs to have inter-processor communication between the coarse-grain processors (SMs or TPs). Despite this simplicity, the mere possibility of on-chip communication opens up many challenges, and makes the programming even more difficult than it currently is. We therefore provide a solution to the programming challenge by limiting access to the communication through a disciplined API and with a mechanism that can be statically checked. This allows us to propose simple modifications to existing runtime systems for GPUs to manage the execution of the new API on the SPU architecture. Based on our analytical models, we expect an order of magnitude reductions in the energy cost when stencil codes are implemented on the proposed architecture.
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