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CHO: Towards a Benchmark Suite for OpenCL FPGA Accelerators

Geoffrey Ndu, Javier Navaridas, Mikel Lujan
School of Computer Science, The University of Manchester Oxford Road, Manchester, M13 9PL, United Kingdom
3rd International Workshop on OpenCL (IWOCL), 2015

@article{ndu2015cho,

   title={CHO: Towards a Benchmark Suite for OpenCL FPGA Accelerators},

   author={Ndu, Geoffrey and Navaridas, Javier and Luj{‘a}n, Mikel},

   year={2015}

}

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Programming FPGAs with OpenCL-based high-level synthesis frameworks is gaining attention with a number of commercial and research frameworks announced. However, there are no benchmarks for evaluating these frameworks. To this end, we present CHO benchmark suite an extension of CHStone, a commonly used C-based high-level synthesis benchmark suite, for OpenCL. We characterise CHO at various levels and use it to investigate compiling non-trivial software to FPGAs. CHO is work in progress and more benchmarks will be added with time.
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