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Irregular algorithms on the Xeon Phi

Sander Lijbrink
Universiteit van Amsterdam
Universiteit van Amsterdam, 2015

@article{lijbrink2015irregular,

   title={Irregular algorithms on the Xeon Phi},

   author={Lijbrink, Sander},

   year={2015}

}

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The Xeon Phi is a coprocessor first released in 2012 by Intel. With x86 instruction set support, 60 cores and up to 2 teraflops of single-precision performance, the Xeon Phi seems promising and has gained wide interest. The world’s fastest supercomputer to date, the Tianhe-2, features the Xeon Phi, so does the recently announced 180 petaflops supercomputer Aurora. Irregular algorithms such as graph processing algorithms are the core of many high-performance applications. Due to random memory access patterns and workload imbalance, this family of algorithms is challenging to implement on parallel hardware. This thesis investigates the performance of these algorithms on the Intel Xeon Phi 5110P compared to a dual-socket Xeon X5650 setup. We try to determine what kind of workloads can be run e!ciently on the Xeon Phi. First, we show that the memory bandwidth of the Xeon Phi is significantly higher than the Xeon. We also show that the Xeon Phi performs better than the Xeon in matrix multiplication, a regular and vectorizable algorithm. To determine the impact of the Xeon Phi’s architecture on irregular algorithms, we have implemented and evaluated two key graph algorithms, breadth-first search and PageRank. We conclude that memory-intensive algorithms such as BFS perform well on the Xeon Phi. However, compute-intensive algorithms such as PageRank suffer from the Xeon Phi’s architectural trade-offs
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