First Application of Lattice QCD to Pezy-SC Processor

Tatsumi Aoyama, Ken-Ichi Ishikawa, Yasuyuki Kimura, Hideo Matsufuru, Atsushi Sato, Tomohiro Suzuki, Sunao Torii
Kobayashi-Maskawa Institute for the Origin of Particles and the Universe (KMI), Nagoya University, Japan
Procedia Computer Science, Volume 80, Pages 1418-1427, 2016


   title={First Application of Lattice QCD to Pezy-SC Processor},

   author={Aoyama, Tatsumi and Ishikawa, Ken-Ichi and Kimura, Yasuyuki and Matsufuru, Hideo and Sato, Atsushi and Suzuki, Tomohiro and Torii, Sunao},

   journal={Procedia Computer Science},






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Pezy-SC processor is a novel new architecture developed by Pezy Computing K. K. that has achieved large computational power with low electric power consumption. It works as an accelerator device similarly to GPGPUs. A programming environment that resembles OpenCL is provided. Using a hybrid parallel system "Suiren" installed at KEK, we port and tune a simulation code of lattice QCD, which is computational elementary particle physics based on Monte Carlo method. We offload an iterative solver of a linear equation for a fermion matrix, which is in general the most time consuming part of the lattice QCD simulations. On single and multiple Pezy-SC devices, the sustained performance is measured for the matrix multiplications and a BiCGStab solver. We examine how the data layout affects the performance. The results demonstrate that the Pezy-SC processors provide a feasible environment to perform numerical lattice QCD simulations.
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