OpenCL-Based FPGA Accelerator for 3D FDTD with Periodic and Absorbing Boundary Conditions

Hasitha Muthumala Waidyasooriya, Tsukasa Endo, Masanori Hariyama, Yasuo Ohtera
Graduate School of Information Sciences, Tohoku University, Aoba 6-3-09, Aramaki-Aza-Aoba, Sendai, Miyagi 980-8579, Japan
International Journal of Reconfigurable Computing, Volume 2017, Article ID 6817674, 2017


   title={OpenCL-Based FPGA Accelerator for 3D FDTD with Periodic and Absorbing Boundary Conditions},

   author={Waidyasooriya, Hasitha Muthumala and Endo, Tsukasa and Hariyama, Masanori and Ohtera, Yasuo},

   journal={International Journal of Reconfigurable Computing},



   publisher={Hindawi Publishing Corporation}


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Finite difference time domain (FDTD) method is a very poplar way of numerically solving partial differential equations. FDTD has a low operational intensity so that the performances in CPUs and GPUs are often restricted by the memory bandwidth. Recently, deeply pipelined FPGA accelerators have shown a lot of success by exploiting streaming data flows in FDTD computation. In spite of this success, many FPGA accelerators are not suitable for real-world applications that contain complex boundary conditions. Boundary conditions break the regularity of the data flow, so that the performances are significantly reduced. This paper proposes an FPGA accelerator that computes commonly used absorbing and periodic boundary conditions in many 3D FDTD applications. Accelerator is designed using a "C-like" programming language called OpenCL (open computing language). As a result, the proposed accelerator can be customized easily by changing the software code. According to the experimental results, we achieved over 3.3 times and 1.5 times higher processing speed compared to the CPUs and GPUs, respectively. Moreover, the proposed accelerator is more than 14 times faster compared to the recently proposed FPGA accelerators that are capable of handling complex boundary conditions.
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