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Architectural Support for the Stream Execution Model on General-Purpose Processors

Jayanth Gummaraju, Mattan Erez, Joel Coburn, Mendel Rosenblum, William J. Dally
Computer Systems Laboratory, Stanford University
In PACT ’07: Proceedings of the 16th International Conference on Parallel Architecture and Compilation Techniques (2007), pp. 3-12

@conference{gummaraju2007architectural,

   title={Architectural support for the stream execution model on general-purpose processors},

   author={Gummaraju, J. and Erez, M. and Coburn, J. and Rosenblum, M. and Dally, W.J.},

   booktitle={Proceedings of the 16th International Conference on Parallel Architecture and Compilation Techniques},

   pages={3–12},

   isbn={0769529445},

   year={2007},

   organization={IEEE Computer Society}

}

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There has recently been much interest in stream processing, both in industry (e.g., Cell, NVIDIA G80, ATI R580) and academia (e.g., Stanford Merrimac, MIT RAW), with stream programs becoming increasingly popular for both media and more general-purpose computing. Although a special style of programming called stream programming is needed to target these stream architectures, huge performance benefits can be achieved. In this paper, we minimally add architectural features to commodity general-purpose processors (e.g., Intel/AMD) to efficiently support the stream execution model. We design the extensions to reuse existing components of the general-purpose processor hardware as much as possible by investigating low-cost modifications to the CPU caches, hardware prefetcher, and the execution core. With a less than 1% increase in die area along with judicious use of a software runtime system, we can efficiently support stream programming on traditional processor cores. We evaluate our techniques by running scientific applications on a cycle-level simulation system. The results show that our system executes stream programs as efficiently as possible, limited only by the ALU performance and the memory bandwidth needed to feed the ALUs.
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