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Power analysis and optimizations for GPU architecture using a power simulator

Guibin Wang
Nat. Lab. for Parallel & Distrib. Process. Sch. of Comput., Nat. Univ. of Defense Technol., Changsha, China
3rd International Conference on Advanced Computer Theory and Engineering (ICACTE), 2010

@conference{wang2010power,

   title={Power analysis and optimizations for GPU architecture using a power simulator},

   author={Wang, G.},

   booktitle={Advanced Computer Theory and Engineering (ICACTE), 2010 3rd International Conference on},

   volume={1},

   pages={V1–619},

   issn={2154-7491},

   organization={IEEE}

}

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As one of the most popular many-core architecture, GPUs have illustrated power in many non-graphic applications. Traditional general purpose computing systems tend to integrate GPU as the co-processor to accelerate parallel computing tasks. Meanwhile, GPUs also result in high power consumption, which accounts for a large proportion of the total system power consumption. In this paper, we mainly focus on the power analysis and optimizations for GPU architecture. The main contributions of this paper are: firstly, we establish a GPU power research platform, which is extended from an existing GPU simulator with several power models; secondly, we validate that, as the gap between shader core and memory speed becomes larger and larger, integrating more shader cores or enhancing running frequencies may not bring better performance, but results in higher energy consumption; thirdly, we show that traditional power optimization methods for CPUs, such as dynamic frequency scaling and concurrency-throttling, could be effectively applied on GPU architectures for better power efficiency, especially for memory-intensive applications.
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