Energy-Efficient FPGA Implementation for Binomial Option Pricing Using OpenCL

Valentin Mena Morales, Pierre-Henri Horrein, Amer Baghdadi, Erik Hochapfel, Sandrine Vaton
Institut Mines-Telecom; Telecom Bretagne; CNRS Lab-STICC, IRISA, Brest, France
hal-00979390, (16 April 2014)




   title={Energy-Efficient FPGA Implementation for Binomial Option Pricing Using OpenCL},

   author={MENA MORALES, Valentin and HORREIN, Pierre-Henri and BAGHDADI, Amer and HOCHAPFEL, Erik and VATON, Sandrine},


   affiliation={D{‘e}partement Electronique – ELEC , ADACSYS , D{‘e}partement informatique – INFO , Laboratoire des sciences et techniques de l’information, de la communication et de la connaissance – Lab-STICC , Institut de Recherche en Informatique et Syst{‘e}mes Al{‘e}atoires – IRISA},

   booktitle={DATE 2014 : Design, Automation and Test in Europe},


   address={Dresden, Allemagne},

   journal={DATE 2014 : Design, Automation and Test in Europe},

   note={14026 14026},





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Energy efficiency of financial computations is a performance criterion that can no longer be dismissed, and is as crucial as raw acceleration and accuracy of the solution. In order to reduce the energy consumption of financial accelerators, FPGAs offer a good compromise with low power consumption and high parallelism. However, designing and prototyping an application on an FPGA-based platform are typically very timeconsuming and requires significant skills in hardware design. This issue constitutes a major drawback with respect to softwarecentric acceleration platforms and approaches. A high-level approach has been chosen, using Altera’s implementation of the OpenCL standard, to answer this issue. We present two FPGA implementations of the binomial option pricing model on American options. The results obtained on a Terasic DE4 – Stratix IV board form a solid basis to hold all the constraints necessary for a real world application. The best implementation can evaluate more than 2000 options/s with an average power of less than 20W.
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