Evolution of thread-level parallelism in desktop applications
University of Michigan, Ann Arbor
In ISCA ’10: Proceedings of the 37th annual international symposium on Computer architecture (2010), pp. 302-313.
@article{blake2010evolution,
title={Evolution of thread-level parallelism in desktop applications},
author={Blake, G. and Dreslinski, R.G. and Mudge, T. and Flautner, K.},
journal={ACM SIGARCH Computer Architecture News},
volume={38},
number={3},
pages={302–313},
issn={0163-5964},
year={2010},
publisher={ACM}
}
As the effective limits of frequency and instruction level parallelism have been reached, the strategy of microprocessor vendors has changed to increase the number of processing cores on a single chip each generation. The implicit expectation is that software developers will write their applications with concurrency in mind to take advantage of this sudden change in direction. In this study we analyze whether software developers for laptop/desktop machines have followed the recent hardware trends by creating software for chip multi-processing. We conduct a study of a wide range of applications on Microsoft Windows 7 and Apple’s OS X Snow Leopard, measuring Thread Level Parallelism on a high performance workstation and a low power desktop. In addition, we explore graphics processing units (GPUs) and their impact on chip multi-processing. We compare our findings to a study done 10 years ago which concluded that a second core was sufficient to improve system responsiveness. Our results on today’s machines show that, 10 years later, surprisingly 2-3 cores are more than adequate for most applications and that the GPU often remains under-utilized. However, in some application specific domains an 8 core SMT system with a 240 core GPU can be effectively utilized. Overall these studies suggest that many-core architectures are not a natural fit for current desktop/laptop applications.
November 7, 2010 by hgpu