Kalman Filter Tracking on Parallel Architectures
University of California – San Diego, La Jolla, CA, 92093, USA
arXiv:1505.04540 [physics.ins-det], (18 May 2015)
@article{cerati2015kalman,
title={Kalman Filter Tracking on Parallel Architectures},
author={Cerati, Giuseppe and Elmer, Peter and Lantz, Steven and McDermott, Kevin and Riley, Dan and Tadel, Matevz and Wittich, Peter and Wurthwein, Frank and Yagil, Avi},
year={2015},
month={may},
archivePrefix={"arXiv"},
primaryClass={physics.ins-det}
}
Power density constraints are limiting the performance improvements of modern CPUs. To address this we have seen the introduction of lower-power, multi-core processors, but the future will be even more exciting. In order to stay within the power density limits but still obtain Moore’s Law performance/price gains, it will be necessary to parallelize algorithms to exploit larger numbers of lightweight cores and specialized functions like large vector units. Example technologies today include Intel’s Xeon Phi and GPGPUs. Track finding and fitting is one of the most computationally challenging problems for event reconstruction in particle physics. At the High Luminosity LHC, for example, this will be by far the dominant problem. The need for greater parallelism has driven investigations of very different track finding techniques including Cellular Automata or returning to Hough Transform. The most common track finding techniques in use today are however those based on the Kalman Filter. Significant experience has been accumulated with these techniques on real tracking detector systems, both in the trigger and offline. They are known to provide high physics performance, are robust and are exactly those being used today for the design of the tracking system for HL-LHC. Our previous investigations showed that, using optimized data structures, track fitting with Kalman Filter can achieve large speedup both with Intel Xeon and Xeon Phi. We report here our further progress towards an end-to-end track reconstruction algorithm fully exploiting vectorization and parallelization techniques in a realistic simulation setup.
May 20, 2015 by hgpu
