Novel Computing Architectures
US National Center for Supercomputing Applications
Computing in Science and Engineering, Vol. 11, No. 3. (May 2009), pp. 54-57
@article{kindratenko2009novel,
title={Novel computing architectures},
author={Kindratenko, V.V.},
journal={Computing in Science & Engineering},
volume={11},
number={3},
pages={54–57},
issn={1521-9615},
year={2009},
publisher={IEEE}
}
We can make smaller transistors, but we have a hard time making them run faster. Yet, the demand for computing power is growing. This challenge has led to a renewed interest in novel computing architectures that can take advantage of shrinking transistor size and deliver the necessary application performance improvements.
November 25, 2010 by hgpu
Recent source codes
SYCL-BLAS: An implementation of BLAS using the SYCL open standard for acceleration on OpenCL devices
