AXC: A new format to perform the SpMV oriented to Intel Xeon Phi architecture in OpenCL

E. Coronado-Barrientos, G. Indalecio, A. Garcia-Loureiro
Centro Singular de Investigacion en Tecnoloxías da Informacion (CiTIUS), Universidade de Santiago de Compostela, Santiago de Compostela, Spain
Concurrency and Computation: Practice and Experienc}, 31, 2019


   title={AXC: A new format to perform the SpMV oriented to Intel Xeon Phi architecture in OpenCL},

   author={Coronado-Barrientos, E and Indalecio, G and Garc{‘i}a-Loureiro, A},

   journal={Concurrency and Computation: Practice and Experience},





   publisher={Wiley Online Library}


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Emerging new architectures used in High Performance Computing require new research to adapt and optimise algorithms to them.As part of this effort, we propose the newAXC format to improve the performance of the SpMV product for the Intel Xeon Phi coprocessor. The performance of the OpenCL kernel, based on our new format, is compared with three very different and high efficient sparse matrix formats, ie, CSR, ELLR-T, and K1. We perform tests with most of the matrices from theWilliams collection used to test SpMV kernels for GPUs architectures in several related works. The numerical results show that the AXC format is more robust to spatial indirections proper of sparse matrices and prefers matrices with low variability amongst their rows’ population, very much like matrices originated by FEM codes. The Conjugate Gradient (CG) is implemented in OpenCL using all the formats in this work to expose strengths and weaknesses of the formats in a real application. The CG implementation shows that the AXC has the fastest conversion time and its coherent with the numerical results generated by the SpMV tests, and that the format has a slower memory operations time due to an extra step required by the format and its larger memory footprint.
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