The Study of the OpenCL Processing Models for the FPGA Devices
AGH University of Science and Technology, Krakow, Poland
Computer Science 20(1): 85-97, 2019
@article{szkotak2019study,
title={THE STUDY OF THE OPENCL PROCESSING MODELS FOR THE FPGA DEVICE},
author={Szkotak, Piotr and Russek, Pawel and Wiatr, Kazmierz},
journal={Computer Science},
volume={20},
number={1},
year={2019}
}
In our study, we present the results of the implementation of the SHA-512 algorithm in FPGAs. The distinguished element of our work is that we conducted the work using OpenCL for FPGA, which is a relatively new development method for reconfigurable logic. We examine loop unrolling as an OpenCL performance optimization method and compare the efficiency of the different kernel implementation types: NDRange, Single-Work Item, and SIMD kernels. In our conclusions, we compare the metrics of the created FPGA accelerator to the corresponding GPGPU solutions. Also, our paper is accompanied by a source code repository to allow the reader to follow and extend our survey.
April 7, 2019 by hgpu
