Scalable Programming Models for Massively Multicore Processors
Rapid Mind Inc., Waterloo
Proceedings of the IEEE In Proceedings of the IEEE, Vol. 96, No. 5. (15 April 2008), pp. 816-831
@article{mccool2008scalable,
title={Scalable programming models for massively multicore processors},
author={McCool, M.D.},
journal={Proceedings of the IEEE},
volume={96},
number={5},
pages={816–831},
issn={0018-9219},
year={2008},
publisher={IEEE}
}
Including multiple cores on a single chip has become the dominant mechanism for scaling processor performance. Exponential growth in the number of cores on a single processor is expected to lead in a short time to mainstream computers with hundreds of cores. Scalable implementations of parallel algorithms will be necessary in order to achieve improved single-application performance on such processors. In addition, memory access will continue to be an important limiting factor on achieving performance, and heterogeneous systems may make use of cores with varying capabilities and performance characteristics. An appropriate programming model can address scalability and can expose data locality while making it possible to migrate application code between processors with different parallel architectures and variable numbers and kinds of cores. We survey and evaluate a range of multicore processor architectures and programming models with a focus on GPUs and the Cell BE processor. These processors have a large number of cores and are available to consumers today, but the scalable programming models developed for them are also applicable to current and future multicore CPUs.
December 14, 2010 by hgpu