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FANS: FPGA-Accelerated Near-Storage Sorting

Weikang Qiao, Jihun Oh, Licheng Guo, Mau-Chung Frank Chang, Jason Cong
University of California, Los Angeles, USA
29th IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM’21), 2021

@article{qiaofans,

   title={FANS: FPGA-Accelerated Near-Storage Sorting},

   author={Qiao, Weikang and Oh, Jihun and Guo, Licheng and Chang, Mau-Chung Frank and Cong, Jason},

   year={2021}

}

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Large-scale sorting is always an important yet demanding task for data center applications. In addition to powerful processing capability, high-performance sorting system requires efficient utilization of the available bandwidth of various levels in the memory hierarchy. Nowadays, with the explosive data size, the frequent data transfers between the host and the storage device are becoming increasingly a performance bottleneck. Fortunately, the emergence of near-storage computing devices gives us the opportunity to accelerate large-scale sorting by avoiding the back and forth data transfer. Near-storage sorting is promising for extra performance improvement and power reduction. However, it is still an open question of how to achieve the optimal sorting performance on the existing near-storage computing device. In this work, we first perform an in-depth analysis of the sorting performance on the newly released Samsung SmartSSD platform. Contrary to the previous belief, our analysis shows that the end-to-end sorting performance is bound by not only the bandwidth of the flash, but also the main memory bandwidth, the configuration of the sorting kernel and the intermediate sorting status. Based on our modeling, we propose FANS, an FPGA accelerated near-storage sorting system which selects the optimized design configuration and achieves the theoretically maximum end-to-end performance when using a single Samsung SmartSSD device. The experiments demonstrate more than 3x performance speedup over the state-of-art FPGA-accelerated flash storage.
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