Implicit Parallel Time Integrators

Andrew Christlieb, Benjamin Ong
Department of Math, Michigan State University, East Lansing, MI 48823
Journal of Scientific Computing (20 December 2010), pp. 1-13


   title={Implicit Parallel Time Integrators},

   author={Christlieb, A. and Ong, B.},

   journal={Journal of Scientific Computing},





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In this work, we discuss a family of parallel implicit time integrators for multi-core and potentially multi-node or multi-gpgpu systems. The method is an extension of Revisionist Integral Deferred Correction (RIDC) by Christlieb, Macdonald and Ong (SISC-2010) which constructed parallel explicit time integrators. The key idea is to re-write the defect correction framework so that, after initial startup costs, each correction loop can be lagged behind the previous correction loop in a manner that facilitates running the predictor and correctors in parallel. In this paper, we show that RIDC provides a framework to use p cores to generate a pth-order implicit solution to an initial value problem (IVP) in approximately the same wall clock time as a single core, backward Euler implementation (p≤12). The construction, convergence and stability of the schemes are presented, along with supporting numerical evidence.
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