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FLOWER: A Comprehensive Dataflow Compiler for High-Level Synthesis

Puya Amiri, Arsene Perard-Gayot, Richard Membarth, Philipp Slusallek, Roland Leißa, Sebastian Hack
German Research Center for Artificial Intelligence (DFKI), Germany
Proceedings of the International Conference on Field-Programmable Technology (FPT), pp. 1-9, Virtual Conference, 2021

@article{amiri2021flower,

   title={FLOWER: A Comprehensive Dataflow Compiler for High-Level Synthesis},

   author={Amiri, Puya and P{‘e}rard-Gayot, Arsene and Membarth, Richard and Slusallek, Philipp and Lei{ss}a, Roland and Hack, Sebastian},

   year={2021}

}

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FPGAs have found their way into data centers as accelerator cards, making reconfigurable computing more accessible for high-performance applications. At the same time, new high-level synthesis compilers like Xilinx Vitis and runtime libraries such as XRT attract software programmers into the reconfigurable domain. While software programmers are familiar with task-level and data-parallel programming, FPGAs often require different types of parallelism. For example, data-driven parallelism is mandatory to obtain satisfactory hardware designs for pipelined dataflow architectures. However, software programmers are often not acquainted with dataflow architectures—resulting in poor hardware designs. In this work we present FLOWER, a comprehensive compiler infrastructure that provides automatic canonical transformations for high-level synthesis from a domain-specific library. This allows programmers to focus on algorithm implementations rather than low-level optimizations for dataflow architectures. We show that FLOWER allows to synthesize efficient implementations for high-performance streaming applications targeting Systemon-Chip and FPGA accelerator cards, in the context of image processing and computer vision.
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