Acceleration of the 3D ADI-FDTD method using graphics processor units
Dept. of Electron. & Electr. Eng., Univ. of Glasgow, Glasgow, UK
IEEE MTT-S International Microwave Symposium Digest, 2009. MTT ’09
@inproceedings{stefanski2009acceleration,
title={Acceleration of the 3D ADI-FDTD method using graphics processor units},
author={Stefanski, TP and Drysdale, T.D.},
booktitle={Microwave Symposium Digest, 2009. MTT’09. IEEE MTT-S International},
pages={241–244},
year={2009},
organization={IEEE}
}
We present preliminary results of the acceleration of the three-dimensional (3D) alternating direction implicit finite-difference time-domain (ADI-FDTD) method on graphics processor units (GPUs). Although the ADI-FDTD iteration comprises two substeps, which each require solving a tridiagonal matrix system of equations over xy, xz, yz planes of the domain, the application of this scheme frees the time-step size from the Courant-Friedrichs-Lewy stability constraint. In our implementation we took advantage of the fine-grain thread parallelism and coarse-grained block parallelism of the GPU architecture, allowing us to use the parallel cyclic reduction method to simultaneously solve many tridiagonal systems of equations. We obtained a satisfactory speedup of the method indicating that GPUs represent an inexpensive source of computational power for accelerated ADI-FDTD simulations.
July 8, 2011 by hgpu
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