Efficient floating-point texture decompression

Tomi Aarnio, Claudio Brunelli, Timo Viitanen
Nokia Res. Center, Tampere, Finland
International Symposium on System on Chip (SoC), 2010


   title={Efficient floating-point texture decompression},

   author={Aarnio, T. and Brunelli, C. and Viitanen, T.},

   booktitle={System on Chip (SoC), 2010 International Symposium on},





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We propose a novel hardware design for decoding compressed floating-point textures in a graphics processing unit (GPU). Our decoder is based on the NXR texture format, which provides lossy, fixed-rate 6:1 compression for floating-point textures. Our design exploits the constraints of the compressed pixel blocks to produce the correct output using only fixed-point arithmetic. This results in significantly lower silicon area occupation compared to pre-existing floating-point texture decoders.
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