2PARMA: Parallel Paradigms and Run-time Management Techniques for Many-Core Architectures

C.Silvano, W.Fornaciari, S.Crespi Reghizzi, G.Agosta, G.Palermo, V.Zaccaria, P.Bellasi, F.Castro, S.Corbetta, A.Di Biagio, E.Speziale, M. Tartara, D.Siorpaes, H.Hubert, B.Stabernack, J.Brandenburg, M.Palkovic, P.Raghavan, C.Ykman-Couvreur, A.Bartzas, S.Xydis, D.Soudris, T.Kempf, G.Ascheid, R.Leupers, H.Meyr, J.Ansari, P.Mahonen, B.Vanthournout
Dipartimento di Elettronica e Informazione, Politecnico di Milano, Italy
VLSI 2010 Annual Symposium, Lecture Notes in Electrical Engineering, Volume 105, Part 1, 65-79, 2011


   author={Silvano, C. and Fornaciari, W. and Reghizzi, S. Crespi and Agosta, G. and Palermo, G. and Zaccaria, V. and Bellasi, P. and Castro, F. and Corbetta, S. and Biagio, A. and Speziale, E. and Tartara, M. and Melpignano, D. and Zins, J.-M. and Siorpaes, D. and Hubert, H. and Stabernack, B. and Brandenburg, J. and Palkovic, M. and Raghavan, P. and Ykman-Couvreur, C. and Bartzas, A. and Xydis, S. and Soudris, D. and Kempf, T. and Ascheid, G. and Leupers, R. and Meyr, H. and Ansari, J. and Mahonen, P. and Vanthournout, B.},

   affiliation={Dipartimento di Elettronica e Informazione – Politecnico di Milano, Milano, Italy},

   title={2PARMA: Parallel Paradigms and Run-time Management Techniques for Many-Core Architectures},

   booktitle={VLSI 2010 Annual Symposium},

   series={Lecture Notes in Electrical Engineering},

   editor={Voros, Nikolaos and Mukherjee, Amar and Sklavos, Nicolas and Masselos, Konstantinos and Huebner, Michael},

   publisher={Springer Netherlands},









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The 2PARMA project focuses on the development of parallel programming models and run-time resource management techniques to exploit the features of many-core processor architectures. The main goals of the 2PARMA project are: definition of a parallel programming model combining component-based and single-instruction multiple-thread approaches, instruction set virtualisation based on portable byte-code, run-time resource management policies and mechanisms as well as design space exploration methodologies for many-core computing architectures.
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