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GCN Inference Acceleration using High-Level Synthesis

Yi Chien Lin, Bingyi Zhang, Viktor Prasanna

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Tags: Computer science, Data parallelism, Design space exploration, FPGA, nVidia, nVidia GeForce GTX Titan XP, OpenCL, Package

October 10, 2021 by hgpu

ScaleHLS: Scalable High-Level Synthesis through MLIR

Hanchen Ye, Cong Hao, Jianyi Cheng, Hyunmin Jeong, Jack Huang, Stephen Neuendorffer, Deming Chen

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Tags: Computer science, Design space exploration, FPGA, HLS, Neural networks, Package

August 8, 2021 by hgpu

HALF: Holistic Auto Machine Learning for FPGAs

Jonas Ney, Dominik Loroch, Vladimir Rybalkin, Nico Weber, Jens Krüger, Norbert Wehn

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Tags: Computer science, Design space exploration, FPGA, HLS, Machine learning, Neural networks

July 4, 2021 by hgpu

Enabling Energy-Efficient DNN Training on Hybrid GPU-FPGA Accelerators

Xin He, Jiawen Liu, Zhen Xie, Hao Chen, Guoyang Chen, Weifeng Zhang, Dong Li

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Tags: Computer science, Deep learning, Design space exploration, FPGA, Hybrid computing, nVidia, OpenCL, Tesla V100

May 2, 2021 by hgpu

Optimal program variant generation for hybrid manycore systems

Cristian Urlea

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Tags: Computer science, Design space exploration, FPGA, Heterogeneous systems, OpenCL, performance portability, Thesis

February 21, 2021 by hgpu

CNN2Gate: An Implementation of Convolutional Neural Networks Inference on FPGAs with Automated Design Space Exploration

Alireza Ghaffari, Yvon Savaria

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Tags: Computer science, Design space exploration, FPGA, Machine learning, Neural networks, OpenCL

December 27, 2020 by hgpu

Design Space Exploration of an OpenCL Based SAXPY Kernel Implementation on FPGAs

Jannatun Naher, Clay Gloster, Shrikant S. Jadhav, Christopher C. Doss

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Tags: Computer science, Design space exploration, FPGA, Linear Algebra, OpenCL

April 19, 2020 by hgpu

Using Machine Learning to Estimate Utilization and Throughput for OpenCL-Based SpMV Implementation on an FPGA

Jannatun Naher, Clay Gloster, Shrikant S. Jadhav, Christopher C. Doss

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Tags: Computer science, Design space exploration, DSP, FPGA, Linear Algebra, Machine learning, OpenCL, Sparse matrix

April 12, 2020 by hgpu

Solving convex optimization problems on FPGA using OpenCL

Martijn Berkers

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Tags: Algorithms, Computer science, Design space exploration, FPGA, OpenCL, Thesis

March 8, 2020 by hgpu

Performance Debugging Frameworks for FPGA High-Level Synthesis

Young-kyu Choi

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Tags: Benchmarking, Computer science, Design space exploration, FPGA, HLS, Performance, Thesis

October 27, 2019 by hgpu

Fast Code Exploration for Pipeline Processing in FPGA Accelerators

Leandro de Souza Rosa

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Tags: Computer science, Design space exploration, FPGA, HLS, Thesis

September 8, 2019 by hgpu

Compilers for Portable Programming of Heterogeneous Parallel & Approximate Computing Systems

Prakalp Srivastava

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Tags: Code generation, Computer science, Design space exploration, Heterogeneous systems, nVidia, nVidia GeForce GTX 680, OpenCL, performance portability

September 8, 2019 by hgpu

HLS Portability from Intel to Xilinx: A Case Study

HEXL: Intel Homomorphic Encryption Acceleration Library

Accelerating Encrypted Computing on Intel GPUs

Taskflow: A General-purpose Parallel and Heterogeneous Task Programming System

Taskflow: A Lightweight Parallel and Heterogeneous Task Graph Computing System

CompilerGym: a library performant reinforcement learning environments for compiler tasks

CompilerGym: Robust, Performant Compiler Optimization Environments for AI Research

HPCToolkit

Measurement and Analysis of GPU-accelerated Applications with HPCToolkit

NVPTX-SPIR-V Translator

Supporting CUDA for an extended RISC-V GPU architecture

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high performance computing on graphics processing units: hgpu.org

GCN Inference Acceleration using High-Level Synthesis

ScaleHLS: Scalable High-Level Synthesis through MLIR

HALF: Holistic Auto Machine Learning for FPGAs

Enabling Energy-Efficient DNN Training on Hybrid GPU-FPGA Accelerators

Optimal program variant generation for hybrid manycore systems

CNN2Gate: An Implementation of Convolutional Neural Networks Inference on FPGAs with Automated Design Space Exploration

Design Space Exploration of an OpenCL Based SAXPY Kernel Implementation on FPGAs

Using Machine Learning to Estimate Utilization and Throughput for OpenCL-Based SpMV Implementation on an FPGA

Solving convex optimization problems on FPGA using OpenCL

Performance Debugging Frameworks for FPGA High-Level Synthesis

Fast Code Exploration for Pipeline Processing in FPGA Accelerators

Compilers for Portable Programming of Heterogeneous Parallel & Approximate Computing Systems

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