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Compilation and Design Space Exploration of Dataflow Programs for Heterogeneous CPU-GPU Platforms

Aurélien François Gilbert Bloch

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Tags: Compilers, Computer science, CUDA, Design space exploration, DSP, FPGA, Heterogeneous systems, nVidia, nVidia GeForce GTX 1660, nVidia GeForce RTX 3080 Ti, Package, Thesis

June 25, 2023 by hgpu

DeepAxe: A Framework for Exploration of Approximation and Reliability Trade-offs in DNN Accelerators

Mahdi Taheri, Mohamad Riazati, Mohammad Hasan Ahmadilivani, Maksim Jenihhin, Masoud Daneshtalab, Jaan Raik, Mikael Sjodin, Bjorn Lisper

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Tags: Computer science, Deep learning, Design space exploration, FPGA, HLS, Neural networks, Package

March 5, 2023 by hgpu

Pulsar search acceleration using FPGAs and OpenCL templates

Julian Oppermann, Mitchell B. Mickaliger, Oliver Sinnen

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Tags: Astrophysics, Design space exploration, FPGA, OpenCL, Package, Physics, Signal processing

January 29, 2023 by hgpu

Design Space Exploration of Concurrency Mapping to FPGAs in Weather and Climate Applications with Xilinx SDSoC OpenCL, SDSoC C++ and Vivad

Moteb Salem Alghamdi

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Tags: Computer science, Design space exploration, FPGA, HLS, HPC, OpenCL, Thesis

November 27, 2022 by hgpu

An OpenCL-Based FPGA Accelerator for Faster R-CNN

Jianjing An, Dezheng Zhang, Ke Xu, Dong Wang

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Tags: Computational Complexity, Computer science, Deep learning, Design space exploration, FPGA, Neural networks, nVidia, OpenCL, Package, RNN, Tesla K40

October 2, 2022 by hgpu

Lina: a fast design optimisation tool for software-based FPGA programming

Andre Bannwart Perina

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Tags: Computer science, Design space exploration, FPGA, nVidia, nVidia Quadro K620, OpenCL, Package, Thesis

September 4, 2022 by hgpu

FPGA Acceleration of Structured-Mesh-Based Explicit and Implicit Numerical Solvers using SYCL

K. Kamalakkannan, G.R. Mudalige, I.Z. Reguly, S.A. Fahmy

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Tags: Computer science, Design space exploration, FPGA, nVidia, SYCL, Tesla V100

May 8, 2022 by hgpu

Simulation Methodologies for Mobile GPUs

Kuba Kaszyk

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Tags: Computer science, Design space exploration, OpenCL, simulation, Thesis

March 27, 2022 by hgpu

Studying the Potential of Automatic Optimizations in the Intel FPGA SDK for OpenCL

Adel Ejjeh, Vikram Adve, Rob Rutenbar

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Tags: Computer science, Design space exploration, FPGA, HLS, OpenCL

January 16, 2022 by hgpu

CFU Playground: Full-Stack Open-Source Framework for Tiny Machine Learning (tinyML) Acceleration on FPGAs

Shvetank Prakash, Tim Callahan, Joseph Bushagour, Colby Banbury, Alan V. Green, Pete Warden, Tim Ansell, Vijay Janapa Reddi

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Tags: Computer science, Design space exploration, FPGA, Machine learning, Package

January 9, 2022 by hgpu

GCN Inference Acceleration using High-Level Synthesis

Yi Chien Lin, Bingyi Zhang, Viktor Prasanna

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Tags: Computer science, Data parallelism, Design space exploration, FPGA, nVidia, nVidia GeForce GTX Titan XP, OpenCL, Package

October 10, 2021 by hgpu

ScaleHLS: Scalable High-Level Synthesis through MLIR

Hanchen Ye, Cong Hao, Jianyi Cheng, Hyunmin Jeong, Jack Huang, Stephen Neuendorffer, Deming Chen

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Tags: Computer science, Design space exploration, FPGA, HLS, Neural networks, Package

August 8, 2021 by hgpu

CATO: automatic source transformation to apply HPC frameworks with minimal user interaction

Compiler-assisted distribution of OpenMP code for improved scalability

ADIOS2.jl: a Julia interface to ADIOS2

Julia as a unifying end-to-end workflow language on the Frontier exascale system

Code generated HPC Kernels Using Llama-2-70b

Comparing Llama-2 and GPT-3 LLMs for HPC kernels generation

Scope is all you need: Transforming LLMs for HPC Code

pocl - Portable Computing Language

PoCL-R: An Open Standard Based Offloading Layer for Heterogeneous Multi-Access Edge Computing with Server Side Scalability

HPAC-Offload: Accelerating HPC Applications with Portable Approximate Computing on the GPU

openCLDispatcher

Novel insights on atomic synchronization for sort-based group-by on GPUs

CEED Benchmarks

Performant low-order matrix-free finite element kernels on GPU architectures

Sieve: Stratified GPU-Compute Workload Sampling

EngineCL: Usability and Performance in Heterogeneous Computing

Mashing load balancing algorithm to boost hybrid kernels in molecular dynamics simulations

See all packages

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high performance computing on graphics processing units: hgpu.org

Compilation and Design Space Exploration of Dataflow Programs for Heterogeneous CPU-GPU Platforms

DeepAxe: A Framework for Exploration of Approximation and Reliability Trade-offs in DNN Accelerators

Pulsar search acceleration using FPGAs and OpenCL templates

Design Space Exploration of Concurrency Mapping to FPGAs in Weather and Climate Applications with Xilinx SDSoC OpenCL, SDSoC C++ and Vivad

An OpenCL-Based FPGA Accelerator for Faster R-CNN

Lina: a fast design optimisation tool for software-based FPGA programming

FPGA Acceleration of Structured-Mesh-Based Explicit and Implicit Numerical Solvers using SYCL

Simulation Methodologies for Mobile GPUs

Studying the Potential of Automatic Optimizations in the Intel FPGA SDK for OpenCL

CFU Playground: Full-Stack Open-Source Framework for Tiny Machine Learning (tinyML) Acceleration on FPGAs

GCN Inference Acceleration using High-Level Synthesis

ScaleHLS: Scalable High-Level Synthesis through MLIR

Recent source codes

CATO: automatic source transformation to apply HPC frameworks with minimal user interaction

ADIOS2.jl: a Julia interface to ADIOS2

Code generated HPC Kernels Using Llama-2-70b

Scope is all you need: Transforming LLMs for HPC Code

pocl - Portable Computing Language

HPAC-Offload: Accelerating HPC Applications with Portable Approximate Computing on the GPU

openCLDispatcher

CEED Benchmarks

Sieve: Stratified GPU-Compute Workload Sampling

EngineCL: Usability and Performance in Heterogeneous Computing

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