high performance computing on graphics processing units: hgpu.org

This paper describes a flexible simulator for background Radio Frequency clutter developed at the Georgia Tech Research Institute, and how this simulation was accelerated with the use of nVidia GPUs using GPU VSIPL. The paper describes the mathematical basis for the simulation and how it can be used to simulate RF environments and scenarios; introduces […]

Given multiple images of the same scene, image registration is the process of determining the correct transformation to bring the images into a common coordinate system-i.e., how the images fit together. Featurebased registration applies a transformation function to the input images before performing the correlation step. The result of that transformation, also called feature extraction, […]

We speed up the tetrahedral interpolation step of a deformable image registration code called MORFEUS. We implement several versions of the interpolation code on a Fermi GPU (GTX480). Despite the irregularity of the code, we obtained kernel speedups of up to 24.6x, 33.7x and 62.4x on three real-life benchmarks. These numbers do not include the […]

The graphics processor units (GPUs) have evolved into high-performance co-processors that can be easily programmed with common high-level language such as C, Fortran and C++. Today’s GPUs greatly outpace CPUs in arithmetic performance and memory bandwidth, making them the ideal coprocessor to accelerate a variety of data parallel applications. Here, we shall describe the application […]

Power has emerged as a significant constraint to high performance systems. We propose modeling power-based performance (performance/watt) and clock-based performance for GPGPUs and FPGAs. Based on the modeling, we perform a case-study with mixed precision linear solvers for a Xilinx XC5VLX330T FPGA and NVIDIA Tesla C1060 GPU. In the case-study, the FPGA shows power- and […]

Double precision floating-point performance is critical for hardware acceleration technologies to be adopted by domain scientists. In this work we use the Hessenberg reduction to demonstrate the potential of FPGAs and GPUs for obtaining satisfactory double precision floating-point performance. Currently a Xeon (Nehalem) 2.26 GHz CPU can outperform Xilinx Virtex4LX200 by 3.6 folds. However, given […]

In this paper, we describe a GPU-accelerated implementation of a logic minimization heuristic based on the near minimal approach. This algorithm has three key kernel computations, and the current version of our implementation, we adapted one of these kernels for GPU execution. In this paper we report our results gained from using NVIDIA’s CUDA development […]

Continuum quantum Monte Carlo (QMC) has proved to be an invaluable tool for predicting the properties of matter from fundamental principles. By solving the manybody Schrodinger equation through a stochastic projection, it achieves greater accuracy than mean-field methods and better scalability than quantum chemical methods, enabling scientific discovery across a broad spectrum of disciplines. The […]

Scientific applications very often rely on solving one or more linear systems. When matrices are sparse, iterative methods are preferred to direct ones. Nevertheless, the value of nonzero elements and their distribution (i.e., the sketch of the matrix) greatly influence the efficiency of those methods (in terms of computation time, number of iterations, result precision) […]

This paper presents the design of Power Flow algorithm that has enhanced performance on the Graphics Processing Unit (GPU) using Compute Unified Device Architecture (CUDA). This work investigates the performance of optimized CPU versions of Newton-Raphson (Polar form) and Gauss-Jacobi power flow algorithms, highlights the approach used to reduce the computation time by performing these […]

Cholesky decomposition has been widely utilized for positive symmetric matrix factorization in solving least square problems. Various parallel accelerators including GPUs and FPGAs have been explored to improve performance. In this paper, Cholesky decomposition is implemented on both FPGAs and GPUs by designing a dedicated architecture for FPGAs and exploiting massively parallel computation for GPUs. […]

With the help of of CUDA [7], [6], many applications improved their performance by using GPUs. In our project called Matrix Algebra on GPU and Multicore Architectures (MAGMA) [10], we mainly focus on dense linear algebra routines similar to those from LAPACK [1]. Other than CUDA, there exist other frameworks that allow platformindependent programming for […]