high performance computing on graphics processing units: hgpu.org

hgpu.org » Intel HD 5200

Efficient FFT mapping on GPU for radar processing application: modeling and implementation

Mohamed Amine Bergach, Emilien Kofman, Robert de Simone, Serge Tissot, Michel Syska

View

Tags: FFT, GPGPU, Intel HD 5200, Intel HD Graphics 4000, OpenCL, SAR

June 1, 2015 by Aminems

* * *

SYCL-DNN: a library implementing neural network algorithms written using SYCL

User-Driven Online Kernel Fusion for SYCL

SW#SYCL

Assessing Opportunities of SYCL and Intel oneAPI for Biological Sequence Alignment

StateMover: a checkpoint-based debugging framework for FPGAs

Hardware Checkpointing and Productive Debugging Flows for FPGAs

Flink-TornadoVM-Artifact

Challenges and Techniques for Transparent Acceleration of Unmodified Big Data Applications

Kernel Tuner

Going green: optimizing GPUs for energy efficiency through model-steered auto-tuning

TorchOpt: an efficient library for differentiable optimization built upon PyTorch

TorchOpt: An Efficient Library for Differentiable Optimization

NaturalCC: An Open-Source Toolkit for Code Intelligence

A Study on Neural-based Code Summarization in Low-resource Settings

mt4g: Memory Topology for GPUs

Capturing the Memory Topology of GPUs

iGniter: an interference-aware GPU resource provisioning framework for achieving predictable performance of DNN inference in the cloud

iGniter: Interference-Aware GPU Resource Provisioning for Predictable DNN Inference in the Cloud

pyGSL: A Scalable Library for Graph Structure Learning

pyGSL: A Graph Structure Learning Toolkit

See all packages

* * *

* * *

HGPU group © 2010-2022 hgpu.org

All rights belong to the respective authors

Login | Sitemap | Feedback | Policy

Contact us: