A Dynamic IP Lookup Architecture using Parallel Multiple Hash in GPU-based Software Router

Xin Yao, Yaping Lin, Gang Wang, Guoliang Hu
School of Information Science and Engineering, Hunan University, Changsha 410082, China
Journal of Computational Information Systems 9: 3, 967-976, 2013

   title={A Dynamic IP Lookup Architecture using Parallel Multiple Hash in GPU-based Software Router},

   author={YAO, Xin and LIN, Yaping and WANG, Gang and HU, Guoliang},

   journal={Journal of Computational Information Systems},






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As the fiber propagation velocity grows and the routing scale expands, IP lookup speed becomes the major bottleneck of high-performance network. Its efficiency directly determines the throughput of the entire routing channel. Recently, Graphics Processing Units (GPUs), highly parallel, flexibility for program and low price, is widely adopted in different areas including software router. In this paper, we propose an architecture named GPU-Based Parallel Multiple Hash IP Lookup/Update Architecture (GPMHIA) to perform high-performance IP address lookup/update. We design a high-speed IP address lookup/update architecture based on IPv4, and this architecture can be easily extended to IPv6. Meanwh-ile, parallel multiple hash functions have been used for accelerating the matching speed and we propose an Adaptive Optimal XOR Hash (AOXH) to construct hash functions. Simulation results using 5 real IPv4 forwarding tables present that GPMHIA is a high-performance IP forwarding architecture.
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