high performance computing on graphics processing units: hgpu.org

The Intel Xeon Phi coprocessor has software prefetching instructions to hide memory latencies and special store instructions to save bandwidth on streaming nontemporal store operations. In this work, we provide details on compiler-based generation of these instructions and evaluate their impact on the performance of the Intel Xeon Phi coprocessor using a wide range of parallel applications with different characteristics. Our results show that the Intel Composer XE 2013 compiler can make effective use of these mechanisms to achieve significant performance improvements.