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Automated Testing of Graphics Shader Compilers

Alastair F. Donaldson, Hugues Evrard, Andrei Lascu, Paul Thomson

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Tags: AMD Radeon R9 Fury, ARM, ATI, ATI Radeon HD 7700, Compilers, Computer science, GLSL, Intel, nVidia, nVidia GeForce GTX 770, nVidia GeForce GTX Titan X, OpenGL, Rendering, Security, Shaders, WebGL

September 21, 2017 by hgpu

Input Space Splitting for OpenCL

Simon Moll, Johannes Doerfert, Sebastian Hack

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Tags: Compilers, Computer science, Intel, LLVM, OpenCL

March 5, 2016 by hgpu

A Survey of Architectural Techniques For Improving Cache Power Efficiency

Sparsh Mittal

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Tags: Architecture, cache, cpu, Energy-efficient computing, GPU, Intel, Memory, Power-efficient computing

January 19, 2015 by sparsh0mittal

Preliminary Experiments with XKaapi on Intel Xeon Phi Coprocessor

Joao Vicente Ferreira Lima, Francois Broquedis, Thierry Gautier, Bruno Raffin

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Tags: Computer science, Factorization, Intel, Intel Phi, Intel Xeon Phi

November 11, 2013 by hgpu

Understanding the Costs of Many-Task Computing Workloads on Intel Xeon Phi Coprocessors

Jeffrey Johnson, Scott J. Krieder, Benjamin Grimmer, Justin M. Wozniaky, Michael Wildeyz, Ioan Raicu

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Tags: Computer science, Heterogeneous systems, Intel, Intel Phi

October 21, 2013 by hgpu

OpenCL Task Partitioning in the Presence of GPU Contention

Dominik Grewe, Zheng Wang, and Michael F.P. O'Boyle

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Tags: Computer science, Heterogeneous systems, Intel, Intel HD Graphics 4000, Machine learning, OpenCL, Task scheduling

September 25, 2013 by hgpu

Performance Evaluation of Intel Xeon Phi Coprocessor using XKaapi

Joao V. F. Lima, Nicolas Maillard, Franciois Broquedis, Thierry Gautier, Bruno Raffin

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Tags: Benchmarking, Computer science, Intel, Intel Phi, Performance

August 26, 2013 by hgpu

First experiences with the Intel MIC architecture at LRZ

Volker Weinberg, Momme Allalen

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Tags: Computer science, Intel, Intel Phi, OpenMP, Performance

August 15, 2013 by hgpu

Compiler-based Data Prefetching and Streaming Non-temporal Store Generation for the Intel Xeon Phi Coprocessor

Rakesh Krishnaiyer, Emre Kultursay, Pankaj Chawla, Serguei Preis, Anatoly Zvezdin, Hideki Saito

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Tags: Compilers, Computer science, Intel, Intel Phi, Prefetch

August 8, 2013 by hgpu

Lattice QCD on Intel Xeon Phi

Balint Joo, Dhiraj D. Kalamkar, Karthikeyan Vaidyanathan, Mikhail Smelyanskiy, Kiran Pamnany, Victor W Lee, Pradeep Dubey, William Watson III

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Tags: CUDA, High Energy Physics - Lattice, Intel, Intel Phi, nVidia, Physics, QCD, Tesla K20

July 20, 2013 by hgpu

Benchmarking Intel Xeon Phi to Guide Kernel Design

Jianbin Fang, Ana Lucia Varbanescu, Henk Sips, Lilun Zhang, Yonggang Che, Chuanfu Xu

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Tags: Benchmarking, Computer science, Intel, Intel Phi, Performance

July 14, 2013 by hgpu

Identifying the Key Features of Intel Xeon Phi: A Comparative Approach

Jianbin Fang, Ana Lucia Varbanescu, Henk Sips

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Tags: Computer science, Intel, Intel Phi, Performance

July 13, 2013 by hgpu

A Versatile Software Systolic Execution Model for GPU Memory-Bound Kernels

A Versatile Software Systolic Execution Model for GPU Memory-Bound Kernels

blockgmf: Block based approaches to Matrix Factorization

Block based Singular Value Decomposition approach to matrix factorization for recommender systems

CU2CL: A prototype CUDA-to-OpenCL source-to-source translator

On the Portability of CPU-Accelerated Applications via Automated Source-to-Source Translation

GPU-based Parallel Computation Support for Stan

GPU-based Parallel Computation Support for Stan

PANNA: Properties from Artificial Neural Network Architectures

PANNA: Properties from Artificial Neural Network Architectures

Artifact Evaluation for Novel methodologies for predictable CPU-to-GPU command offloading

Novel Methodologies for Predictable CPU-To-GPU Command Offloading

tvm: Open deep learning compiler stack for cpu, gpu and specialized accelerators

A Unified Optimization Approach for CNN Model Inference on Integrated GPUs

picongpu: Particle-in-Cell Simulations for the Exascale Era

PIConGPU: Predictive Simulations of Laser-Particle Accelerators with Manycore Hardware

WCCV: Warp-coherent Condition Vectorization(on top of RV)

WCCV: Improving the Vectorization of IF-statements with Warp-Coherent Conditions

Triton: An Intermediate Language and Compiler for Tiled Neural Network Computations

Triton: An Intermediate Language and Compiler for Tiled Neural Network Computations

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2019

May

13-15

Boston, USA

7th International Workshop on OpenCL, 2019

2019

May

13

Boston, MA, USA

Distributed Heterogeneous Programming in C/C++ (DHPCC++), 2019

2019

May

14

Larnaca, Cyprus

3rd International Workshop on Theoretical Approaches to Performance Evaluation, Modeling and Simulation (TAPEMS), 2019

2019

July

26-28

Rome, Italy

International Conference on Frontiers of Neural Networks (ICFNN), 2019

2019

July

26-28

Rome, Italy

International Conference on Frontiers of Artificial Intelligence and Machine Learning (FAIML), 2019

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