high performance computing on graphics processing units: hgpu.org

Ultrasound scanners are often used in medical diagnostics for visualising body parts without entering the body. An image is created by visualising reflections from an ultrasound pulse, transmitted into the body. Current scanners use a scanning which creates an image line by line, using focused pulses on each line separately. This method results in high quality images, but it limits the frame rate. In order to increase the frame rate, a different scanning method, called plane wave scanning, has to be used. With plane wave scanning a complete frame is acquired using a single ultrasound pulse on all channels. However, plane wave scanning increases the computational load, because more data needs to be processed after each transmission. Therefore, more compute performance is needed to pave the way for high frame rate ultrasound imaging in to the kHz range, while a maximum frame rate of only 100 Hz is common today. GPGPU technology can deliver the needed performance requirements. Esaote created a plane wave ultrasound research platform, allowing researchers to create their own applications for control of the scanner, receiving data, and for processing. In order to support researchers, with processing on a GPU, a high performance computing framework is created, which manages a compute pipeline on a GPU. The framework allows researchers to focus on the GPU implementations of their algorithms, instead of application development. The first pipeline implemented with the framework shows a 67 times improvement, compared to a naive CPU implementation, reaching a frame rate of 6.8 kHz at 8 mm image depth. The improvement gets bigger for larger image depths, because the GPU’s peak performance is not reached at small depths. When designing a system it is important to select a GPU, which meets the frame rate requirements. In order to assist system designers, with the selection of a GPU, a performance model is introduced. The model divides a kernel in parts and estimates the running time of each part. The running time of the entire kernel is predicted by taking the sum of all kernel parts. The results in this thesis show an error of 10% or less for the NVidia Fermi architecture.