On Dynamic Load Balancing on Graphics Processors

Daniel Cederman, Philippas Tsigas
Department of Computer Science and Engineering, Chalmers University of Technology, SE-412 96 Goteborg, Sweden
Proceedings of the 23rd ACM SIGGRAPHEUROGRAPHICS symposium on Graphics hardware (2008), Publisher: The Eurographics Association, Pages: 57-64


   title={On dynamic load balancing on graphics processors},

   author={Cederman, D. and Tsigas, P.},

   booktitle={Proceedings of the 23rd ACM SIGGRAPH/EUROGRAPHICS symposium on Graphics hardware},



   organization={Eurographics Association}


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To get maximum performance on the many-core graphics processors it is important to have an even balance of the workload so that all processing units contribute equally to the task at hand. This can be hard to achieve when the cost of a task is not known beforehand and when new sub-tasks are created dynamically during execution. With the recent advent of scatter operations and atomic hardware primitives it is now possible to bring some of the more elaborate dynamic load balancing schemes from the conventional SMP systems domain to the graphics processor domain.
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