Design and Evaluation of Scalable Concurrent Queues for Many-Core Architectures
Department of Computer Science, Virginia Tech
Virginia Polytechnic Institute & State University, Technical Report number: TR-14-03, 2014
@article{scogland2014design,
title={Design and Evaluation of Scalable Concurrent Queues for Many-Core Architectures},
author={Scogland, Thomas RW and Feng, Wu-chun},
year={2014}
}
As core counts increase and as heterogeneity becomes more common in parallel computing, we face the prospect of programming hundreds or even thousands of concurrent threads in a single shared-memory system. At these scales, even highly-efficient concurrent algorithms and data structures can become bottlenecks, unless they are designed from the ground up with throughput as their primary goal. In this paper, we present three contributions: (1) a characterization of queue designs in terms of modern multi- and many-core architectures, (2) the design of a high-throughput concurrent FIFO queue for many-core architectures that avoids the bottlenecks common in modern queue designs, and (3) a thorough evaluation of concurrent queue throughput across CPU, GPU, and co-processor devices. Our evaluation shows that focusing on throughput, rather than progress guarantees, allows our queue to scale to as much as three orders of magnitude (1000X) faster than lock-free and combining queues on GPU platforms and two times (2X) faster on CPU devices. These results deliver critical insight into the design of data structures for highly concurrent systems: (1) progress guarantees do not guarantee scalability, and (2) allowing an algorithm to block can actually increase throughput.
August 15, 2014 by hgpu