16915

An OpenCL(TM) Deep Learning Accelerator on Arria 10

Utku Aydonat, Shane O’Connell, Davor Capalija, Andrew C. Ling, Gordon R. Chiu
Intel Corporation
arXiv:1701.03534 [cs.DC], (13 Jan 2017)

@article{aydonat2017opencltm,

   title={An OpenCL(TM) Deep Learning Accelerator on Arria 10},

   author={Aydonat, Utku and O’Connell, Shane and Capalija, Davor and Ling, Andrew C. and Chiu, Gordon R.},

   year={2017},

   month={jan},

   archivePrefix={"arXiv"},

   primaryClass={cs.DC}

}

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Convolutional neural nets (CNNs) have become a practical means to perform vision tasks, particularly in the area of image classification. FPGAs are well known to be able to perform convolutions efficiently, however, most recent efforts to run CNNs on FPGAs have shown limited advantages over other devices such as GPUs. Previous approaches on FPGAs have often been memory bound due to the limited external memory bandwidth on the FPGA device. We show a novel architecture written in OpenCL(TM), which we refer to as a Deep Learning Accelerator (DLA), that maximizes data reuse and minimizes external memory bandwidth. Furthermore, we show how we can use the Winograd transform to significantly boost the performance of the FPGA. As a result, when running our DLA on Intel’s Arria 10 device we can achieve a performance of 1020 img/s, or 23 img/s/W when running the AlexNet CNN benchmark. This comes to 1382 GFLOPs and is 10x faster with 8.4x more GFLOPS and 5.8x better efficiency than the state-of-the-art on FPGAs. Additionally, 23 img/s/W is competitive against the best publicly known implementation of AlexNet on nVidia’s TitanX GPU.
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