17332

Speeding up lattice sieve with Xeon Phi coprocessor

Anja Becker, Dusan Kostic
EPFL, Lausanne, Switzerland
Cryptology ePrint Archive: Report 2017/592, 2017

@article{becker2017speeding,

   title={Speeding up lattice sieve with Xeon Phi coprocessor},

   author={Becker, Anja and Kostic, Dusan},

   year={2017}

}

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Major substep in a lattice sieve algorithm which solves the Euclidean shortest vector problem (SVP) is the computation of sums and Euclidean norms of many vector pairs. Finding a solution to the SVP is the foundation of an attack against many lattice based crypto systems. We optimize the main subfunction of a sieve for the regular main processor and for the co-processor to speed up the algorithm in total. Furthermore, we show that the co-processor can provide a significant performance improvement for highly parallel tasks in the lattice sieve. Four-fold speed up achieved, compared to the CPU, indicates that co-processors are a viable choice for implementation of lattice sieve algorithms.
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