A Survey on Evaluating and Optimizing Performance of Intel Xeon Phi
IIT Hyderabad, Kandi, Sangareddy 502285, Telangana, India
IIT Hyderabad, 2019
@article{mittal2019survey,
title={A Survey on Evaluating and Optimizing Performance of Intel Xeon Phi},
author={Mittal, Sparsh and Anand, Osho and Kumarr, Visnu P},
year={2019}
}
Intel’s Xeon Phi combines the parallel processing power of a many-core accelerator with the programming ease of CPUs. In this paper, we present a survey of works that study the architecture of Phi and use it as an accelerator for a broad range of applications. We review performance optimization strategies as well as the factors that bottleneck the performance of Phi. We also review works that perform comparison or collaborative execution of Phi with CPUs and GPUs. This paper will be useful for computer-architects, developers seeking to accelerate their applications and researchers in the area of high-performance computing.
June 9, 2019 by hgpu
