Software Compilation Techniques for Heterogeneous Embedded Multi-Core Systems
Institute for Communication Technologies and Embedded Systems, RWTH Aachen University, ICT cubes, Kopernikusstrae 16, 52074 Aachen, Germany
Chapter in Handbook of Signal Processing Systems (3rd Edition), 2019
@incollection{leupers2019software,
title={Software compilation techniques for heterogeneous embedded multi-core systems},
author={Leupers, Rainer and Aguilar, Miguel Angel and Castrillon, Jeronimo and Sheng, Weihua},
booktitle={Handbook of Signal Processing Systems},
pages={1021–1062},
year={2019},
publisher={Springer}
}
The increasing demands of modern embedded systems, such as highperformance and energy-efficiency, have motivated the use of heterogeneous multicore platforms enabled by Multiprocessor System-on-Chips(MPSoCs). To fully exploit the power of these platforms, new tools are needed to address the increasing software complexity to achieve a high productivity. An MPSoC compiler is a toolchain to tackle the problems of application modeling, platform description, software parallelization, software distribution and code generation for an efficient usage of the target platform. This chapter discusses various aspects of compilers for heterogeneous embedded multi-core systems, using the well-established single-core C compiler technology as a baseline for comparison. After a brief introduction to the MPSoC compiler technology, the important ingredients of the compilation process are explained in detail. Finally, a number of case studies from academia and industry are presented to illustrate the concepts discussed in this chapter.
June 16, 2019 by hgpu
