high performance computing on graphics processing units: hgpu.org

Xiaoliang Dai, Peizhao Zhang, Bichen Wu, Hongxu Yin, Fei Sun, Yanghan Wang, Marat Dukhan, Yunqing Hu, Yiming Wu, Yangqing Jia, Peter Vajda, Matt Uyttendaele, Niraj K. Jha

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Tags: Bayesian, Computer science, CUDA, Deep learning, DSP, Neural networks, nVidia, nVidia GeForce GTX 1060

December 30, 2018 by hgpu

Low-power System-on-Chip Processors for Energy Efficient High Performance Computing: The Texas Instruments Keystone II

Gaurav Mitra

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Tags: ARM, Benchmarking, Computer science, DSP, Heterogeneous systems, Matrix multiplication, nVidia, nVidia Jetson TK1, nVidia Tegra TX1, OpenCL, SoC, Thesis

November 12, 2017 by hgpu

Synthesis of Embedded Software using Dataflow Schedule Graphs

Abhay Raina

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Tags: Computer science, DSP, nVidia, nVidia GeForce GTX 680, OpenCL, Signal processing, Thesis

July 2, 2017 by hgpu

A Design Methodology for Efficient Implementation of Deconvolutional Neural Networks on an FPGA

Xinyu Zhang, Srinjoy Das, Ojash Neopane, Ken Kreutz-Delgado

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Tags: Algorithms, Computer science, Computer vision, Deep learning, DSP, FPGA, Neural networks

May 11, 2017 by hgpu

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Open-source FPGA-ML codesign for the MLPerf Tiny Benchmark

MapReduce for Counting Word Frequencies with MPI and GPUs

CoDL: Efficient CPU-GPU Co-execution for Deep Learning Inference on Mobile Devices

SYCLCOMP Utilities

On the Compilation Performance of Current SYCL Implementations

M1 GPUs for (scientific) computations in C++

Seamless GPU acceleration for C++ based physics with the Metal Shading Language on Apple’s M series unified chips

CUB: Cooperative primitives for CUDA C++

Onesweep: A Faster Least Significant Digit Radix Sort for GPUs

Simulator and workload generator for Edge-to-Cloud environments

FELARE: Fair Scheduling of Machine Learning Applications on Heterogeneous Edge Systems

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high performance computing on graphics processing units: hgpu.org

Fast Arbitrary Precision Floating Point on FPGA

MQBench: Towards Reproducible and Deployable Model Quantization Benchmark

Thermal Safety and Real-Time Predictability on Heterogeneous Embedded SoC Platforms

Using Machine Learning to Estimate Utilization and Throughput for OpenCL-Based SpMV Implementation on an FPGA

Hardware Implementation and Quantization of Tiny-Yolo-v2 using OpenCL

Software Compilation Techniques for Heterogeneous Embedded Multi-Core Systems

Accelerating ternary quantized convolutional neural networks using OpenCL for FPGA

ChamNet: Towards Efficient Network Design through Platform-Aware Model Adaptation

Low-power System-on-Chip Processors for Energy Efficient High Performance Computing: The Texas Instruments Keystone II

Synthesis of Embedded Software using Dataflow Schedule Graphs

A Design Methodology for Efficient Implementation of Deconvolutional Neural Networks on an FPGA

Recent source codes

Rodinia Benchmarks for DPC++

DCA++: a state of the art implementation of the dynamical cluster approximation

tntorch - Tensor Network Learning with PyTorch

Open-source FPGA-ML codesign for the MLPerf Tiny Benchmark

MapReduce for Counting Word Frequencies with MPI and GPUs

CoDL: Efficient CPU-GPU Co-execution for Deep Learning Inference on Mobile Devices

SYCLCOMP Utilities

M1 GPUs for (scientific) computations in C++

CUB: Cooperative primitives for CUDA C++

Simulator and workload generator for Edge-to-Cloud environments

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