A map reduce framework for programming graphics processors
University of California, Berkeley, 545Q Cory Hall, Berkeley, California 94720
In In Workshop on Software Tools for MultiCore Systems (2008)
Recent developments in programmable, highly parallel Graphics Processing Units (GPUs) have enabled high performance general purpose computation. We describe a framework designed for high performance GPU programming, built on Nvidia’s Compute Unified Device Architecture (CUDA) platform. The framework is built around the Map Reduce abstraction, which allows application developers to focus on their application, while enabling high performance GPU implementation. We show the utility of our framework by implementing Support Vector Machine training as well as classification, achieving speedups of up to 32x and 150x respectively over commonly used SVM software running on a CPU.
December 12, 2010 by hgpu
