Characterizing Optimizations to Memory Access Patterns using Architecture-Independent Program Features
Australian National University
arXiv:2003.06064 [cs.DC], (12 Mar 2020)
@misc{chilukuri2020characterizing,
title={Characterizing Optimizations to Memory Access Patterns using Architecture-Independent Program Features},
author={Aditya Chilukuri and Josh Milthorpe and Beau Johnston},
year={2020},
eprint={2003.06064},
archivePrefix={arXiv},
primaryClass={cs.DC}
}
High-performance computing developers are faced with the challenge of optimizing the performance of OpenCL workloads on diverse architectures. The Architecture-Independent Workload Characterization (AIWC) tool is a plugin for the Oclgrind OpenCL simulator that gathers metrics of OpenCL programs that can be used to understand and predict program performance on an arbitrary given hardware architecture. However, AIWC metrics are not always easily interpreted and do not reflect some important memory access patterns affecting efficiency across architectures. We propose a new metric of parallel spatial locality — the closeness of memory accesses simultaneously issued by OpenCL work-items (threads). We implement the parallel spatial locality metric in the AIWC framework, and analyse gathered results on matrix multiply and the Extended OpenDwarfs OpenCL benchmarks. The differences in the observed parallel spatial locality metric across implementations of matrix multiply reflect the optimizations performed. The new metric can be used to distinguish between the OpenDwarfs benchmarks based on the memory access patterns affecting their performance on various architectures. The improvements suggested to AIWC will help HPC developers better understand memory access patterns of complex codes and guide optimization of codes for arbitrary hardware targets.
March 29, 2020 by hgpu
