LoopBench: An Evaluation of Loop Acceleration in Heterogeneous Systems

Saman Biookaghazadeh, Fengbo Ren, Ming Zhao
School of Computing, Arizona State University, Tempe, US
Arizona State University, 2019


   title={LoopBench: An Evaluation of Loop Acceleration in Heterogeneous Systems},

   author={Biookaghazadeh, Saman and Ren, Fengbo and Zhao, Ming},



Computational intensive applications usually consist of multiple nested or flattened loops. These loops are the main building blocks of the applications and embody a specific type of execution pattern. In order to reduce the running time of the loops, developers are analyzing the loops in the code and try to parallelize them on the target hardware accelerators in a heterogeneous system, either spatially or temporally. Unfortunately, the lack of understanding of loop characteristics and the ability of hardware accelerators in handling these types of loops prevents application developers from choosing the right platform. In addition, developing an accelerator specific code is a time-consuming effort. To address this issue, we have developed LoopBench, which is a benchmarking tool to assess the effectiveness of available processors, in accelerating different common patterns of loops. LoopBench includes six important types of loops that commonly exist in real-world applications. Further, it evaluates different processors in accelerating these loop patterns. The result from LoopBench explains architectural differences between different accelerators with regard to different loop patterns. In addition, it provides insights for the developers to choose the right accelerators for their applications, before any coding. The current version of our benchmark supports both Field-Programmable Gate Arrays (FPGAs) and Graphics Processing Units (GPUs), which are the most versatile and available accelerators.
No votes yet.
Please wait...

* * *

* * *

HGPU group © 2010-2021 hgpu.org

All rights belong to the respective authors

Contact us: