2794

Comparing FPGAs to Graphics Accelerators and the Playstation 2 Using a Unified Source Description

Lee W. Howes, Paul Price, Oskar Mencer, Olav Beckmann, Oliver Pell
Department of Computing, Imperial College London
International Conference on Field Programmable Logic and Applications, 2006. FPL ’06

@conference{howes2007comparing,

   title={Comparing FPGAs to graphics accelerators and the Playstation 2 using a unified source description},

   author={Howes, L.W. and Price, P. and Mencer, O. and Beckmann, O. and Pell, O.},

   booktitle={Field Programmable Logic and Applications, 2006. FPL’06. International Conference on},

   pages={1–6},

   isbn={142440312X},

   year={2007},

   organization={IEEE}

}

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Field programmable gate arrays (FPGAs), graphics processing units (GPUs) and Sony’s Playstation 2 vector units offer scope for hardware acceleration of applications. We compare the performance of these architectures using a unified description based on A Stream Compiler (ASC) for FPGAs, which has been extended to target GPUs and PS2 vector units. Programming these architectures from a single description enables us to reason about optimizations for the different architectures. Using the ASC description we implement a Monte Carlo simulation, a fast Fourier transform (FFT) and a weighted sum algorithm. Our results show that without much optimization the GPU is suited to the Monte Carlo simulation, while the weighted sum is better suited to PS2 vector units. FPGA implementations benefit particularly from architecture specific optimizations which ASC allows us to easily implement by adding simple annotations to the shared code.
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