An implementation of tensor product patch smoothers on GPU
Interdisciplinary Center for Scientific Computing (IWR), Heidelberg University, Im Neuenheimer Feld 205, 69120 Heidelberg, Germany
arXiv:2405.19004 [math.NA], (30 May 2024)
@misc{cui2024implementation,
title={An implementation of tensor product patch smoothers on GPU},
author={Cu Cui and Paul Grosse-Bley and Guido Kanschat and Robert Strzodka},
year={2024},
eprint={2405.19004},
archivePrefix={arXiv},
primaryClass={math.NA}
}
We present a GPU implementation of vertex-patch smoothers for higher order finite element methods in two and three dimensions. Analysis shows that they are not memory bound with respect to GPU DRAM, but with respect to on-chip scratchpad memory. Multigrid operations are optimized through localization and reorganized local operations in on-chip memory, achieving minimal global data transfer and a conflict free memory access pattern. Performance tests demonstrate that the optimized kernel is at least 2 times faster than the straightforward implementation for the Poisson problem, across various polynomial degrees in 2D and 3D, achieving up to 36% of the peak performance in both single and double precision on Nvidia A100 GPU.
June 2, 2024 by hgpu
