Implementation of a 3GPP LTE turbo decoder accelerator on GPU

M. Wu, Yang Sun, J.R. Cavallaro
Electr. & Comput. Eng., Rice Univ., Houston, TX, USA
IEEE Workshop on Signal Processing Systems (SIPS), 2010


   title={Implementation of a 3GPP LTE turbo decoder accelerator on GPU},

   author={Wu, M. and Sun, Y. and Cavallaro, J.R.},

   booktitle={Signal Processing Systems (SIPS), 2010 IEEE Workshop on},





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This paper presents a 3GPP LTE compliant turbo decoder accelerator on GPU. The challenge of implementing a turbo decoder is finding an efficient mapping of the decoder algorithm on GPU, e.g. finding a good way to parallelize workload across cores and allocate and use fast on-die memory to improve throughput. In our implementation, we increase throughput through 1) distributing the decoding workload for a codeword across multiple cores, 2) decoding multiple codewords simultaneously to increase concurrency and 3) employing memory optimization techniques to reduce memory bandwidth requirements. In addition, we analyze how different MAP algorithm approximations affect both throughput and bit error rate (BER) performance of this decoder.
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