GPU-based DVB-S2 LDPC decoder with high throughput and fast error floor detection

G. Falcao, J. Andrade, V. Silva, L. Sousa
Department of Electrical and Computer Engineering, University of Coimbra, and Instituto de Telecomunicacoes, Polo II – Universidade de Coimbra, Coimbra 3030-290, Portugal
Electronics Letters, Volume 47, Issue 9, p.542-543, 28 April 2011


   title={GPU-based DVB-S2 LDPC decoder with high throughput and fast error floor detection},

   author={Falcao, G. and Andrade, J. and Silva, V. and Sousa, L.},

   journal={Electronics Letters},





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A new strategy is proposed for implementing computationally intensive high-throughput decoders based on the long length irregular LDPC codes adopted in the DVB-S2 standard. It is supported on manycore graphics processing unit (GPU) architectures, for performing parallel multi-threaded decoding of multiple codewords with reduced accesses to global memory. This novel approach is flexible and scalable, and achieves throughputs superior to the 90 Mbit/s required by the DVB-S2 standard, while at the same time it improves error-correcting performances such as BER and error floors regarding conventional VLSI-based decoders.
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