A Reconfigurable Processor for Phylogenetic Inference
Dept. of ES, KTH (R. Inst. of Technol.), Stockholm, Sweden
24th International Conference on VLSI Design (VLSI Design), 2011
@inproceedings{liu2011reconfigurable,
title={A Reconfigurable Processor for Phylogenetic Inference},
author={Liu, P. and Hemani, A. and Paul, K.},
booktitle={2011 24th Annual Conference on VLSI Design},
pages={226–231},
year={2011},
organization={IEEE}
}
A reconfigurable processor tailored for accelerating Phylogenetic Inference is proposed. In this paper, a programmable and scalable architectural platform instantiates an array of coarse grained light weight processing elements and allows arbitrary partitioning and scheduling schemes and capable of solving complete Maximum Likelihood algorithm and deal with arbitrarily large sequences. The key difference of the proposed CGRA based solution compared to FPGA and GPU based solutions is a much better match of the architecture and algorithm for the core computational need as well as the system level architectural need. For the same degree of parallelism, we provide a 2.27X speed-up improvements compared to FPGA with the same amount of core logic, and an 81.87X speed-up improvements compared to GPU with the same silicon area respectively.
June 15, 2011 by hgpu
