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FPGA Based Satisfiability Checking

Rishi Bharadwaj Subramanian

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Tags: Computer science, Electronic design automation, FPGA, Heterogeneous systems, OpenCL, Thesis

June 21, 2020 by hgpu

Performance Optimization of Memory Intensive Applications on FPGA Accelerator

Arslan Arif

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Tags: Artificial intelligence, Computer science, Electronic design automation, FPGA, nVidia, nVidia GeForce GTX 960, OpenCL, Thesis

March 17, 2019 by hgpu

Decoupled Vector-Fetch Architecture with a Scalarizing Compiler

Yunsup Lee

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Tags: Computer science, CUDA, Electronic design automation, Heterogeneous systems, LLVM, OpenCL, Performance, PTX, SoC, Thesis

June 9, 2016 by hgpu

Graphics Processing Unit-Based Computer-Aided Design Algorithms for Electronic Design Automation

Yiding Han

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Tags: Algorithms, Computer science, CUDA, Electronic design automation, nVidia, nVidia GeForce GTS 250, Tesla C1060, Thesis

November 5, 2014 by hgpu

MPI-GIS: New Parallel Overlay Algorithm and System Prototype

Satish Puri, Sushil K. Prasad

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Tags: Algorithms, Computer science, CUDA, Electronic design automation, Heterogeneous systems, MPI, nVidia, nVidia GeForce GTX 780

August 11, 2014 by hgpu

GIS Polygon Overlay Processing: New Parallel Algorithm and System Prototype

Satish Puri, Sushil K. Prasad

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Source codes

Tags: Algorithms, Computer science, CUDA, Electronic design automation, Heterogeneous systems, MPI, nVidia, nVidia GeForce GTX 780, Package

August 5, 2014 by hgpu

Parallel Circuit Simulation on Graphical Processing Unit

Aram Baghdasaryan

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Tags: Computer science, CUDA, Electronic design automation, nVidia, nVidia GeForce 8800 GTS

April 19, 2014 by hgpu

Efficient Multi-GPU Algorithm for All-Pairs Shortest Paths

Guillaume Chapuis, Hristo Djidjev, Rumen Andonov, Sunil Thulasidasan, Dominique Lavenier

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Tags: Algorithms, Computer science, CUDA, Electronic design automation, GPU cluster, nVidia, Path problems, Tesla C2090

November 26, 2013 by hgpu

Acceleration of Hardware Testing and Validation Algorithms using Graphics Processing Units

Min Li

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Tags: Algorithms, Computer science, CUDA, Electronic design automation, Fault simulation, nVidia, nVidia GeForce GTX 285, Thesis

November 25, 2012 by hgpu

Parallel Statistical Analysis of Analog Circuits by GPU-accelerated Graph-based Approach

Xue-Xin Liu, Sheldon X.-D. Tan, Hai Wang

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Tags: Computer science, CUDA, Data parallelism, Electronic design automation, nVidia, Tesla C2070

August 3, 2012 by hgpu

Memory Bandwidth Efficient Two-Dimensional Fast Fourier Transform Algorithm and Implementation for Large Problem Sizes

Berkin Akin, Peter A. Milder, Franz Franchetti, James C. Hoe

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Tags: Algorithms, Computer science, CUDA, Electronic design automation, FFT, FPGA, nVidia, nVidia GeForce GTX 480

April 23, 2012 by hgpu

An Efficient Block Cipher Implementation on Many-Core Graphics Processing Units

Sangpil Lee, Deokho Kim, Jaeyoung Yi, Won Woo Ro

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Tags: Algorithms, Block Ciphers, Computer science, CUDA, Electronic design automation, nVidia, nVidia GeForce GTX 285, Security

April 2, 2012 by hgpu

SimSYCL: Synchronous, single-threaded, library-only SYCL implementation for debugging and verification

SimSYCL: A SYCL Implementation Targeting Development, Debugging, Simulation and Conformance

gpu_tracker: Context manager and CLI that tracks the computational-resource-usage of a code block or shell command, particularly the GPU usage

gpu_tracker: Python package for tracking and profiling GPU utilization in both desktop and high-performance computing environments

CIFAR-10 Airbench: 94% on CIFAR-10 in 3.29 second

94% on CIFAR-10 in 3.29 Seconds on a Single GPU

LOOPer: a polyhedral compiler for expressing fast and portable data parallel algorithms

LOOPer: A Learned Automatic Code Optimizer For Polyhedral Compilers

OpenMC Monte Carlo Code

Performance Portable Monte Carlo Particle Transport on Intel, NVIDIA, and AMD GPUs

Polygeist: C/C++ frontend for MLIR

Retargeting and Respecializing GPU Workloads for Performance Portability

Parallel Gaussian process with kernel approximation in CUDA

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high performance computing on graphics processing units: hgpu.org

FPGA Based Satisfiability Checking

Performance Optimization of Memory Intensive Applications on FPGA Accelerator

Decoupled Vector-Fetch Architecture with a Scalarizing Compiler

Graphics Processing Unit-Based Computer-Aided Design Algorithms for Electronic Design Automation

MPI-GIS: New Parallel Overlay Algorithm and System Prototype

GIS Polygon Overlay Processing: New Parallel Algorithm and System Prototype

Parallel Circuit Simulation on Graphical Processing Unit

Efficient Multi-GPU Algorithm for All-Pairs Shortest Paths

Acceleration of Hardware Testing and Validation Algorithms using Graphics Processing Units

Parallel Statistical Analysis of Analog Circuits by GPU-accelerated Graph-based Approach

Memory Bandwidth Efficient Two-Dimensional Fast Fourier Transform Algorithm and Implementation for Large Problem Sizes

An Efficient Block Cipher Implementation on Many-Core Graphics Processing Units

Recent source codes

SimSYCL: Synchronous, single-threaded, library-only SYCL implementation for debugging and verification

GPU plugin for PySCF

QArray

Celerity: High-level C++ for Accelerator Clusters

gpu_tracker: Context manager and CLI that tracks the computational-resource-usage of a code block or shell command, particularly the GPU usage

CIFAR-10 Airbench: 94% on CIFAR-10 in 3.29 second

LOOPer: a polyhedral compiler for expressing fast and portable data parallel algorithms

OpenMC Monte Carlo Code

Polygeist: C/C++ frontend for MLIR

Parallel Gaussian process with kernel approximation in CUDA

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