Case study: Runtime reduction of a buffer insertion algorithm using GPU parallel programming
North Carolina State University, P.O. Box 7911, Raleigh, 27695, USA
IEEE International SOC Conference (SOCC), 2010
In this paper, we present a case study on runtime reduction of VLSI CAD programs using parallel computing. Specifically, we parallelize a buffer insertion algorithm that minimizes power dissipation. We choose Graphic Processing Units (GPUs) as the low-cost hardware that supports parallel computing. We redesign the algorithm data structure to accommodate GPU based computing. As a result, we are able to achieve an average speedup of 3.43 and the peak speedup of 6.18.
June 23, 2011 by hgpu
