A Hybrid Computing Platform Digital Wideband Receiver Design and Performance Measurement
K. George is with the Computer Engineering Program, California State University, Fullerton, CA 92831 USA.
IEEE Transactions on Instrumentation and Measurement, 2011
@article{george2011hybrid,
title={A Hybrid Computing Platform Digital Wideband Receiver Design and Performance Measurement},
author={George, K. and Chen, C.I.H.},
journal={Instrumentation and Measurement, IEEE Transactions on},
number={99},
pages={1–3},
publisher={IEEE},
year={2011}
}
As a modern radar receiver must rapidly search a large frequency range with maximum sensitivity, capabilities such as high instantaneous dynamic range (IDR), good multiple-signal-detection capability, wider bandwidth (BW), and high-frequency resolution are indispensable. Many techniques proposed to improve digital wideband receiver performance are computationally intensive and limit their real-time performance due to hardware constraint. In this paper, an innovative three gigasample-per-second hybrid computing platform digital wideband receiver system is presented, which employs two Nvidia Tesla C2050 graphics processor units and a Xilinx Virtex-5 field-programmable gate array for hardware acceleration to drastically improve receiver performance over its predecessor designs. The receiver detects five simultaneous signals in 1.25-GHz BW (125-1375 MHz) with a maximum IDR of 42.5 dB and a frequency resolution of 0.5 MHz. The proposed receiver architecture achieves high-resolution spectral estimation and employs a hardware mechanism for multiple-signal detection before the next set of data arrives for processing.
June 30, 2011 by hgpu