Computing spike-based convolutions on GPUs
Center for Embedded Systems, Donald Bren School of Information and Computer Science, University of California, Irvine, CA, USA
IEEE International Symposium on Circuits and Systems, 2009. ISCAS 2009
@inproceedings{nageswaran2009computing,
title={Computing spike-based convolutions on GPUs},
author={Nageswaran, J.M. and Dutt, N. and Wang, Y. and Delbrueck, T.},
booktitle={Circuits and Systems, 2009. ISCAS 2009. IEEE International Symposium on},
pages={1917–1920},
year={2009},
organization={IEEE}
}
In spiking neural networks, asynchronous spike events are processed in parallel by neurons. Emulations of such networks are traditionally computed by CPUs or realized using dedicated neuromorphic hardware. In many neuromorphic systems, the address-event-representation (AER) is used for spike communication. In this paper we present the acceleration of AER based spike processing using a graphics processing unit (GPU). In our experiment we interface a 128times128 pixel AER vision sensor to a spiking neural network implemented on a GPU for real-time convolution-based nonlinear feature extraction with convolution kernel sizes ranging from 48times48 to 112times112 pixels. We show parallelism-performance trade-offs on GPUs for single spike per thread, multiple spikes per thread, and multiple objects parallelism techniques. Our implementation can achieve a kernel speedup of up to 35times on a single NVIDIA GTX280 board when compared to a CPU-only implementation.
July 14, 2011 by hgpu
