A Framework for Automated Performance Tuning and Code Verification on GPU Computing Platforms
Dept. of Computer Science and Engineering and Dept. of Electrical Engineering, University of Colorado Denver, Denver, CO 80204 U.S.A
IEEE International Symposium on Parallel and Distributed Processing Workshops and Phd Forum (IPDPSW), 2011
@inproceedings{gehrke2011framework,
title={A Framework for Automated Performance Tuning and Code Verification on GPU Computing Platforms},
author={Gehrke, A.S. and Ra, I. and Connors, D.A.},
booktitle={Parallel and Distributed Processing Workshops and Phd Forum (IPDPSW), 2011 IEEE International Symposium on},
pages={2113–2116},
year={2011},
organization={IEEE}
}
Emerging multi-core processor designs create a computing paradigm capable of advancing numerous scientific areas, including medicine, data mining, biology, physics, and earth sciences. However, the trends in multi-core hardware technology have advanced far ahead of the advances in software technology and programmer productivity. For the most part, current scientists only leverage multi-core and GPU (Graphical Processing Unit) computing platforms after painstakingly uncovering the inherent task and data-level parallelism in their application. In many cases, the development does not realize the full potential of the parallel hardware. There exists an opportunity to meet the challenges in optimally mapping scientific application domains to multi-core computer systems through the use of compile-time and link-time optimization strategies. We are exploring a code compilation framework that automatically generates and tunes numerical solver codes for optimal performance on graphical processing units. The framework advances computational simulation in kinetic modeling by significantly reducing the execution time of scientific simulations and enabling scientists to compare results to previous models and to extend, modify, and test new models without code changes.
October 5, 2011 by hgpu
