Performance modeling of atomic additions on GPU scratchpad memory
Department of Computer Architecture and Electronics, University of Cordoba, Spain
IEEE Transactions on Parallel and Distributed Systems, 2012
@article{gomez2012performance,
title={Performance modeling of atomic additions on GPU scratchpad memory},
author={G{‘o}mez-Luna, J. and Gonz{‘a}lez-Linares, J.M. and Benavides, J.I. and Guil, N.},
year={2012}
}
GPU application implementations using scatter approaches will fall into write contention due to atomic updates of output elements, if these result from more than one input element. Colliding threads will be serialized, seriously harming performance. Dealing with these issues requires a proper understanding of the behavior of the scratchpad or shared memory under conflicting accesses caused by concurrent threads. Thus, this paper presents an exhaustive microbenchmark-based analysis of atomic additions in shared memory that quantifies the impact of access conflicts on latency and throughput. This analysis has led us to discover the lock mechanism that enables atomic updates to shared memory and to propose a performance model to estimate the latency penalties due to collisions by position or bank conflicts. Then, we have derived experiments from this model that show us the way to optimize applications using atomic operations. Position and bank conflicts can be diminished by replication and padding, respectively. The benefits of such techniques are illustrated with the optimization of two widely-used voting processes: the centroid updating step in k-means clustering, and histogram calculation.
November 14, 2012 by hgpu
