high performance computing on graphics processing units: hgpu.org

The demand for more and more compute power is growing rapidly in many fields of research. Accelerators, like GPUs, are one way to fulfill these requirements, but they often require a laborious rewrite of the application using special programming paradigms like CUDA or OpenCL. The Intel(R) Xeon Phi(TM) coprocessor is based on the Intel(R) Many Integrated Core Architecture and can be programmed with standard techniques like OpenMP, POSIX threads, or MPI. It will provide high performance and low power consumption without the immediate need to rewrite an application. In this work, we focus on OpenMP*-style programming and evaluate the overhead of a selected subset of the language extensions for Intel Xeon Phi coprocessors as well as the overhead of some selected standardized OpenMP constructs. With the help of simple benchmarks and a sparse CG kernel as it is used in many PDE solvers we assess if the architecture can run standard applications efficiently. We apply the Roofline model to investigate the utilization of the architecture. Furthermore, we compare the performance of a Intel Xeon Phi coprocessor system with the performance reached on a large SMP production system.